| IC number | Manufacturer | Documentation |
|---|---|---|
| MCS1007 | MOS Technology | Preliminary Datasheet March, 1973 |
| IC number | Package |
|---|---|
| MCS1007 | 40-pin Ceramic DIP |
| IC number | Chip description | Checksum |
|---|---|---|
| MCS1007-019 |
| Pin | Type | Name | Description |
|---|---|---|---|
| 1 | Power | VGG | -12V Power Supply |
| 2..3 | Input | Ø2..Ø1 | Clock Input |
| 4..12 | Input | Y1..Y9 | Row Signal inputs from Keyboard Matrix. |
| 13..20 | Output | X1..X8 | Column Interrogate pulses supplied by KEA to Keyboard Matrix. |
| 21..23 | |||
| 24 | Input | Repeat Oscillator | A low frequency square wave input to define the repeat frequency of the Strobe signal when in Repeat mode. |
| 25 | Input | Data Acknowledge | A input level or pulse which cause immediate reset of Strobe and Error signals. |
| 26 | Input | Buffer Reset | An input level or pulse causing immediate reset of all data Bits (D1 to D8) and the Parity Bit. |
| 27 | Output | Key Idle | An output signal indicating (when true) that no key is depressed on the Keyboard Matrix. |
| 28 | Output | Strobe | An output signal which becomes true at the beginning of the second scan following a scan in which a new key depression has been detected. The signal remains true until a new key is depressed, or the Data Acknowledge signal is received. The Strobe signal will alternate in synchronism with the Repeat Oscillator signal when operating in the repeat mode. |
| 29 | Output | Error | An output signal which becomes true at the beginning of the scan following a scan in which an error condition occurred. Error conditions include: 1. Two new key signals in one scan. 2. New key signals in two successive scans. The error signal, once set, remains true until: a new key is depressed; all keys are released; or the Data Acknowledge signal is received. |
| 30 | Output | Parity | An odd parity bit generated from the ROM data bits. |
| 31 | |||
| 32..38 | Output | Data Bit 7..Data Bit 1 | Encoded data word output. All bits change to correct level simultaneously one clock period prior to generation of the Strobe signal. Data bit remain valid only for the duration of the Strobe signal (unless reset by activation of Buffer Reset signal). |
| 39 | Output | Data Bit 8 | |
| 40 | Power | VSS | +5V Power Supply |
Copyright © 2005 Ronald van Dijk - All rights reserved
Last update: 13 September 2005