| IC number | Manufacturer | Documentation |
|---|---|---|
| MC68000 | Motorola (now Freescale) | Web page, User's Manual (PDF), User's Manual Addendum (PDF),Programmer's Reference Manual (PDF), Programmer's Reference Manual Errata (PDF) |
| HD68000 | Hitachi | Not available |
| R68000 | Rockwell | Not available |
| SCN68000 | Signetics | Not available |
| IC number | Package | Speed | CBM part number | CBM part description |
|---|---|---|---|---|
| MC68000L8, HD68000L8 | 64-Pin Ceramic DIP | 8 MHz | 390084-03 | MC68000 8 MHZ |
| MC68000P8, HD68000P8, R68000P8, SCN68000C8N64 | 64-Pin Plastic DIP | 8 MHz | ||
| MC68000FN8 | 68-Pin PLCC | 8 MHz | 390084-01 | CPU MC68000FN8 8MHz 68Pin PLCC |
| Amiga | Position | Package | Speed |
|---|---|---|---|
| A1000 | U6S | DIP | 8 MHz |
| A2000 | U1 | DIP | 8 MHz |
| A2000CR | U100 | DIP | 8 MHz |
| A500 | U1 | DIP | 8 MHz |
| A500 Plus | U1 | DIP | 8 MHz |
| CDTV | U51 | DIP | 8 MHz |
| A600 | U1 | PLCC | 8 MHz |
| Pin | Type | Name | Signal name | ||
|---|---|---|---|---|---|
| A1000, A2000 | A2000CR | A500, A500 Plus, CDTV | |||
| 1..5 | I/O | D4..D0 | PD4..PD0 | D4..D0 | |
| 6 | Output | _AS | _AS | ||
| 7 | Output | _UDS | _UDS | ||
| 8 | Output | _LDS | _LDS | ||
| 9 | Output | R/_W | _PRW | R_W | |
| 10 | Input | _DTACK | _DTACK | ||
| 11 | Output | _BG | _BG | ||
| 12 | Input | _BGACK | _BGACK | _BOSS and _BGACK via U303 | _BGACK |
| 13 | Input | _BR | _BR | ||
| 14 | Power | VCC | +5 | +5V | VCC |
| 15 | Input | CLK | 7MP | 7M | 7MHz |
| 16 | Power | GND | GND | ||
| 17 | I/O | _HALT | _HLT | ||
| 18 | I/O | _RESET | _RES | _RST | |
| 19 | Output | _VMA | _VMA | ||
| 20 | Output | E | E | ||
| 21 | Input | _VPA | _VPA | ||
| 22 | Input | _BERR | _BERR | ||
| 23..25 | Input | _IPL2.._IPL0 | _IPL2.._IPL0 | ||
| 26..28 | Output | FC2..FC0 | FC2..FC0 | ||
| 29..48 | Output | A1..A20 | A1..A20 | ||
| 49 | Power | VCC | +5 | +5V | VCC |
| 50..52 | Output | A21..A23 | A21..A23 | ||
| 53 | Power | GND | GND | ||
| 54..64 | I/O | D15..D5 | PD15..PD5 | D15..D5 | |
| Pin | Type | Name | Signal name |
|---|---|---|---|
| A600 | |||
| 1..5 | I/O | D4..D0 | D4..D0 |
| 6 | Output | _AS | _AS |
| 7 | Output | _UDS | _UDS |
| 8 | Output | _LDS | _LDS |
| 9 | Output | R/_W | R_W |
| 10 | Input | _DTACK | _DTACK |
| 11 | Output | _BG | unused |
| 12 | Input | _BGACK | connected to _BGACK of Gayle via R113 |
| 13 | Input | _BR | VCC (via R101) |
| 14 | Power | VCC | VCC |
| 15 | Input | CLK | 7MHZ |
| 16..17 | Power | GND | GND |
| 18 | N/C | NC | unused |
| 19 | I/O | _HALT | _HLT |
| 20 | I/O | _RESET | _RST |
| 21 | Output | _VMA | unused |
| 22 | Output | E | unused |
| 23 | Input | _VPA | VCC via R101 |
| 24 | Input | _BERR | connected to _BEER of Gayle via R114 |
| 25..27 | Input | _IPL2.._IPL0 | _IPL2.._IPL0 |
| 28..30 | Output | FC2..FC0 | unused |
| 31 | N/C | NC | unused |
| 32..51 | Output | A1..A20 | A1..A20 |
| 52 | Power | VCC | VCC |
| 53..55 | Output | A21..A23 | A21..A23 |
| 56..57 | Power | GND | GND |
| 58..68 | I/O | D15..D5 | D15..D5 |
Copyright © 2002-2005 Ronald van Dijk - All rights reserved
Last update: 6 February 2005