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6541 ROM manufactured by MOS Technology

IC number
IC function
16 kbit (2k×8) ROM with two chip selects
Related components
16 kbit (2k×8) ROM with five chip selects

Component documentation
IC numberManufacturerDocumentation
6541MOS TechnologyPreliminary Datasheet July 1977

Component versions
IC numberPackageAccess time
654124-pin DIP300 ns


The 6541 16K Read Only Memory is a monolithic N-channel metal-gate array manufactured with a low-threshold process and utilizing both enhancement and depletion mode MOS transistors.

Three-state outputs provide bus-compatibility with microprocessor-based memory systems. The ROM's are organized as 2048 words of 8 bits each.


  • Interfaces with TTL, DTL or MOS
  • Single +5V supply
  • High speed operation (300 ns access)
  • Three-state outputs
  • Complete address control
  • No external components required
  • No system slow-down
  • Two chip selects
  • Maximum ratings

    Maximum ratings
    Supply VoltageVCC-0.3 to +7.0V
    Input/Output VoltageVIN-0.3 to +7.0V
    Operating TemperatureTOP0 to 70°C
    Storage TemperatureTSTG-55 to +150°C

    Electrical Characteristics

    Electrical Characteristics (VCC = 5.0 V ± 5% VSS = 0 V; TA = 25°C)
    Input High VoltageVIHVSS+2.0-VCCV
    Input Low VoltageVIHVSS-.3-VSS+.8V
    Input Leakage Current (A0-A10, CS1, CS2, Ø2)IIN1.02.5µA
    Input Current for High Impedance (Three State) Outputs: VIN = 0.4V to 2.4VITSI1.010µA
    Output High Voltage: VCC = Min ILOAD <= -100µAVOHVSS+2.4V
    Output Low Voltage: VCC = Min ILOAD <= 1.6mAVOLVSS+.4V
    Output Low Current (sinking) VOL <= .4VIOL1.6mA
    Supply CurrentICC110150mA


    6541 timing diagram

    6541 timing diagram

    Copyright © 2005-2010 Ronald van Dijk - All rights reserved
    MOS Technology 6540/6541 Preliminary Datasheet July 1977
    Last update: 13 May 2010